1. Field of the Invention
The invention relates to semiconductor wafer processing and, more particularly, to a method and apparatus for dicing a semiconductor wafer into a plurality of individual dice.
2. Description of the Related Art
In semiconductor wafer processing, integrated circuits are formed on a wafer (also referred to as a substrate) comprising silicon or another semiconducting material. In general, layers of various materials which are either semiconducting, conducting or insulating are utilized to form the integrated circuits. These materials are doped, deposited and etched using various well-known processes to form integrated circuits. Each wafer is processed to form a large number of individual regions containing integrated circuits known as dice.
Following the integrated circuit formation process, the wafer is xe2x80x9cdicedxe2x80x9d to separate the individual dice from one another for packaging or for use in an unpackaged form within larger circuits. The two main techniques that are used for wafer dicing are scribing and sawing. With scribing, a diamond tipped scribe is moved across the wafer surface along pre-formed scribe lines. These scribe lines extend along the spaces between the dice. These spaces are commonly referred to as xe2x80x9cstreetsxe2x80x9d. The diamond scribe forms shallow scratches in the wafer surface along the streets. Upon the application of pressure, such as with a roller, the wafer separates along the scribe lines. The breaks in the wafer follow the crystal lattice structure of the wafer substrate. Scribing can be used for wafers that are about 10 mils. or less in thickness. For thicker wafers, sawing is presently the preferred method for dicing.
With sawing, a diamond tipped saw rotating at high revolutions per minute contacts the wafer surface and saws the wafer along the streets. The wafer is mounted on a supporting member such as an adhesive film stretched across a film frame and the saw is repeatedly applied to both the vertical and horizontal streets. One problem with either scribing or sawing is that chips and gouges can form along the severed edges of the dice. In addition, cracks can form and propagate from the edges of the dice into the substrate and render the integrated circuit inoperative. Chipping and cracking are particularly a problem with scribing because only one side of a rectangular die can be scribed in the  less than 110 greater than direction of the crystalline structure. Consequently, cleaving of the other side of the die results in a jagged separation line. Because of chipping and cracking, additional spacing is required between the dice on the wafer to prevent damage to the integrated circuits, i.e., the chips and cracks are maintained at a distance from the actual integrated circuits. As a result of the spacing requirements, not as many dice can be formed on a standard sized wafer and wafer real estate that could otherwise be used for circuitry is wasted. The use of a saw exacerbates the waste of real estate on a semiconductor wafer. The blade of the saw is approximate 15 microns thick. As such, to insure that cracking and other damage surrounding the cut made by the saw does not harm the integrated circuits, three to five hundred microns must separate the circuitry of each of the dice. Furthermore, after cutting, the dice require substantial cleaning to remove particles and other contaminants that result from the sawing process.
In an effort to overcome the disadvantages of sawing and scribing. A wet etch process has been proposed to be used in dicing a wafer. The wet etch technique requires an etch mask to be formed on at least one side of the wafer and, in some embodiments, both sides of the wafer. The etch mask defines where the silicon will be etched and protects the integrated circuits from the etchant. Once the mask is in place, the wafer to be immersed in a wet etchant such as potassium hydroxide. The wet etchant removes silicon from between the dice such that the dice are separated from one another.
A wet etch technique removes silicon at a rate of about 30 microns per hour. Thus, even a wafer that has been thinned to a thickness of about 200 microns will require about 7 hours to complete the dicing process. Furthermore, there are well-known disadvantages to wet etch techniques such as the trenches formed with a wet etch do not have substantially vertical sidewalls, the trenches are relatively wide and, to achieve deep vertically directed trenches, the semiconductor wafer can only have certain specific crystal orientations. Further information about such a technique is disclosed in U.S. Pat. No. 5,940,546.
Therefore, there is a need in the art for a method and apparatus for dicing a semiconductor wafer using a smaller separation between the dice and a fast dicing process.
The present invention is a method and apparatus for dicing a semiconductor wafer using a plasma etch process. The method of the present invention begins by applying a patterned mask to the integrated circuits on a wafer. The pattern covers the circuits and exposes the streets between the dice. Next, the method deposits a uniform layer of adhesive material upon a carrier wafer. The wafer to be diced is affixed to the carrier wafer via the adhesive material that is sandwiched between the bottom of the wafer to be diced and the top surface of the carrier wafer. The combination assembly of the carrier wafer, adhesive and wafer to be diced is placed in an etch reactor that is capable of etching silicon. When the reactive gas is applied to the combination assembly, the etchant plasma will consume the unprotected silicon within the streets and dice the wafer into individual integrated circuit chips. The carrier wafer is then removed from the etch chamber with the dice still attached to the adhesive layer. A well-known process is used to remove the adhesive material as well as any remaining mask material and detach the dice from the carrier wafer.